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IRS254(0,1)(S)PbF
form the voltage clamp. The repetition of the spikes
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90
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40
30
20
Enable Duty Cycle Relationship to Light Output
can be reduced by simply increasing the capacitor
size.
The two resistors form a voltage divider for the
output, which is then fed into the cathode of the
zener diode. The diode will only conduct, flooding
the enable pin, when its nominal voltage is
exceeded. The chip will enter a disabled state once
the divider network produces a voltage at least 2.5 V
greater than the zener rating. The capacitor serves
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0
0
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100
only to filter and slow the transients/switching at the
positive output terminal. The clamped output
Percentage of Light Output
Fig.5 Light Output vs Enable Pin Duty Cycle
voltage can be determined by the following analysis.
The choice of capacitor is at the designer’s
discretion.
EN
V out =
( 2 .5 V + DZ )( R 1 + R 2 )
R 2
DZ = Zener Diode Nominal Rated Voltage
HO
LO
Fig.6 IRS254(0,1) Dimming Signals
Open Circuit Protection Mode
By using the suggested
voltage divider,
capacitor, and zener
diode, the output
Vout
R1
voltage can be clamped
at any desired value. In
open-circuit condition
without output clamp,
the positive output
R2
IFB
EN
3
4
Fig.8 Open Circuit Fault Signals, with Clamp
Under-voltage Lock-out Mode
terminal will float at the
high-side input voltage.
Fig.7 Open Circuit
Protection Scheme
Switching will still occur
between the HO and LO
outputs, whether due to the
output voltage clamp or the watchdog timer.
Transients and switching will be observed at the
positive output terminal as seen in Fig. 8. The
difference in signal shape, between the output
voltage and the I FB , is due to the capacitor used to
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The under-voltage lock-out mode (UVLO) is defined
as the state IRS254(0,1) is in when V CC is below the
turn-on threshold of the IC. During startup
conditions, if the IC supply remains below V CCUV+ , the
IRS254(0,1) will enter the UVLO mode. This state is
very similar to when the IC has been disabled via
control signals, except that LO is also held low.
When the supply is increased to V CCUV+ , the IC enters
the normal operation mode. If already in normal
Page 9
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